The present invention relates to a semiconductor integrated circuit and a radio communication apparatus using the same and, particularly to a compound FET (field-effect transistor) semiconductor integrated circuit suitable for high-frequency applications and a radio communication apparatus such as a portable telephone using the semiconductor integrated circuit as a gain-controlled amplifier circuit in a RF front end unit thereof.
A compound FET semiconductor integrated circuit suitable for high-frequency applications is generally used in the RF front end unit of a high-frequency radio communication apparatus typified by a portable telephone. In order to avoid interference of intermodulation distortion from a signal wave on another channel, an RF front end amplifier, which is one such semiconductor integrated circuit, is required to have low distortion characteristics.
The Input Third-Order Intercept Point (IIP3) is generally used as an index indicating the distortion characteristics of an amplifier. The IIP3 required of a front end amplifier in a personal handyphone (PHS) or a digital cellular telephone (PDC) in Japan is about minus several dBm. A gain of about 15 dB and an IIP3 of about −5 dBm can be readily achieved at a drain bias current of about 2 to 3 mA, and thus no practical problems are presented.
However, since a CDMA (Code Division Multiple Access) system whose service has recently been started as another system uses an FDD (Frequency Division Duplex) system that simultaneously transmits and receives, a cross-modulation distortion interference wave newly results from the interference of a transmission wave and a signal wave of another system using the same frequency band. To avoid the effects of the interference wave requires still lower distortion characteristics and an IIP3 performance of plus several dBm.
To achieve the IIP3 performance of plus several dBm requires about two to three times the drain bias current mentioned above. In addition, to deal with the interference of intermodulation distortion from a signal on another channel requires the provision for three standards: a strong electric field; a medium electric field, and a weak electric field, therefore a gain control function is essential.
FIG. 5 is a circuit diagram showing a conventional example of a single-stage, gain-controlled amplifier circuit generally used in the CDMA system.
In FIG. 5, the gain-controlled amplifier circuit according to the conventional example comprises an amplifier circuit unit 101 and a gain control circuit unit 102. The gain-controlled amplifier circuit includes: a signal input terminal 103 to which an input signal RFin is applied; a signal output terminal 104 from which an output signal RFout is derived; bias input terminals 105 and 106 to which bias voltages VDD1 and VDD2 are applied, respectively; a bias input terminal 107 to which a bias voltage VGG is applied; and a gain control terminal 108 to which a gain control voltage CTL is applied externally.
The amplifier circuit unit 101 comprises: a signal amplifying FET Q1 for amplifying the input signal RFin inputted through the signal input terminal 103; a bias resistance Rg1 for supplying a gate bias voltage to the FET Q1; and a choke coil Lb for supplying a drain bias voltage to the FET Q1.
The gain control circuit unit 102 comprises: a signal bypassing FET Q2 for bypassing the input signal RFin to a ground side; a resistance Rg2 for supplying the gain control voltage CTL to a gate of the FET Q2; a resistance Rg3 for supplying a source bias voltage to the FET Q2; a resistance Rg4 for supplying a drain bias voltage to the FET Q2; a coupling capacitance Cb for bypassing the input signal RFin; and a grounding capacitance Cs.
The gain-controlled amplifier circuit utilizes the fact that by changing the gain control voltage CTL applied to the gain control terminal 108, the drain-to-source resistance of the signal bypassing FET Q2 functions as a variable resistance. The gain-controlled amplifier circuit bypasses a part of the input signal RFin to the ground side according to the strength of the input signal RFin, thereby effecting gain control.
However, since the semiconductor integrated circuit, or the gain-controlled amplifier circuit according to the conventional example formed as described above, bypasses a part of the input signal RFin to the ground side, the gain is decreased by the gain control and the IIP3 characteristics are correspondingly improved, but this represents an overdesigned system.
The reason why gain control needs to be effected in the system is because amplification of the input signal RFin in a preceding stage correspondingly increases the load of a block in a succeeding stage to deal with distortion characteristics and hence the load needs to be lightened. Therefore, improving the distortion characteristics, that is, IIP3 characteristics, in the preceding stage more than necessary has no meaning when the system as a whole is considered.
Rather than improving the IIP3 characteristics by gain attenuation, it is advantageous to direct attention to reducing the drain bias current, that is, current consumption. A portable telephone, in particular, is powered by a battery and is limited in battery capacity because of its small size. Thus, a portable telephone is required to consume as little current as possible for longer call and standby time, and accordingly, reduction of current consumption is very important.
FIG. 6 shows an example of the dependence of gain and IIP3 on drain bias current at the time of a maximum gain (no gain attenuation control) in the conventional gain-controlled amplifier circuit using a GaAs FET. In this case, the drain bias current is adjusted by controlling the bias voltage VGG supplied to the bias input terminal 107.
As is clear from FIG. 6, the gain is decreased and the IIP3 also is degraded as the drain bias current is reduced. When converted into gain control step intervals, the standards of a strong electric field, a medium electric field, and a weak electric field required in a CDMA portable telephone system correspond to about 10 dB. Thus, the conditions for changing from a maximum gain of about 15 dB to about 5 dB and −5 dB while maintaining the IIP3 at about 4 to 5 dBm in FIG. 6 are summarized in FIG. 7. FIG. 7 shows the relationship between drain bias current and input signal attenuation at the time of gain attenuation for maintaining the IIP3 at a fixed level.
Hence, a good combination of the drain bias current and the gain attenuation condition can drastically reduce current consumption at the time of the medium electric field and the weak electric field. The gain-controlled amplifier circuit according to the conventional example described above, however, causes a very great variation in gain in response to a current variation, especially at the time of a low drain bias current of about 1 mA, thus presenting a problem in terms of gain stability and variations.